Look-up Table FPGA Synthesis from Minimized Multi-Valued Pseudo Kronecker Expressions

A Design Method for Look-up Table Type FPGA by Pseudo-Kronecker Expansion

Improved Minimization Methods of Pseudo Kronecker Expressions for Multiple Output Functions

Pseudo Kronecker Expressions (PSDKROs) are a class of ANDEXOR expressions. For a Boolean function with a given variable order the minimal PSDKRO can be derived efficiently using Decision Diagram (DD) techniques. The quality, i.e., the number of products in the expression, of the result is known to be dependent on the variable ordering. This paper proposes several improvements and enhancements t...

Pseudo-CT Generation from Magnetic Resonance Imaging by fuzzy look up table algorithm

Introduction: Despite growing interest in the use of magnetic resonance imaging (MRI) in the external radiotherapy design process (RT), Computer Tomography (CT) remains a gold standard and is regarded as a basic imaging modality in radiotherapy. MRI shows the high contrast in soft tissues without any radiation exposure to patients. As a result, MRI is used in functional tissue ...

Fast Regular Expression Matching Using FPGA

With the growing number of viruses and network attacks, Intrusion Detection Systems have to match a large set of regular expressions at multi-gigabit speed to detect malicious activities on the network. Many algorithms and architectures have been designed to accelerate pattern matching, but most of them can be used only for strings or a small set of regular expressions. The capacity of availabl...

Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic

The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiple-valued LUT can be implemented using both current-mode and voltage-mode techniques, reducing the transistor count to half compared to that of a binary implementation. Two main applications for multiple-valued LUTs are multiple-valued FPGAs and intelligent memories. An FPGA uses a LUT as a...